Conventional semiconductor devices, such as conventional nonvolatile memory devices, typically include gate stacks, sources and drains. Generally, a source is positioned at one edge of the gate stack, while the drain is at the opposing end of the gate stack. Field insulating regions generally run perpendicular to the gate stacks and are typically used to electrically isolate different devices. The field insulating regions are typically composed of oxide. The gate stacks, sources and drains are insulated using an interlayer dielectric that is typically composed of HDP, TEOS or BPTEOS. An etch stop layer, typically SiN or SiON, lies below the interlayer dielectric.
In order for the conventional semiconductor device to function, electrical contact is made to portions of the conventional semiconductor device, such as the drains and gate stack. In order to form the contacts, a CoSi layer is formed on the component, such as the drain, to reduce the electrical resistance to the contact. An antireflective coating layer is provided above the interlayer dielectric. The anti-reflective coating layer is typically composed of SiN or SiON. A photoresist mask is provided above the anti-reflective coating layer. The photoresist mask includes apertures above the regions of the interlayer dielectric which are to be etched to form contact holes. Typically, portions of the anti-reflective coating layer, the interlayer dielectric and etch stop layer are removed in a single etch to form contact holes, exposing the underlying CoSi layer. The photoresist mask is then stripped. Typically, the photoresist mask is stripped, typically using an ashing procedure. A wet cleaning is also typically performed to remove remnants of the etch of the interlayer dielectric, such as polymers within the contact hole. A conductive layer, such as a W plug, is deposited to fill the contact holes. The conductive layer can then be polished, typically using a chemical mechanical polish (“CMP”) process. Thus a portion of the conductive layer outside of the contact holes is removed and a smooth surface provided.
Although the conventional method for forming contacts in a semiconductor device functions, one of ordinary skill in the art will readily recognize that the conventional method results in defects. For example, the etch of the anti-reflective coating layer, interlayer dielectric and etch stop layer typically leaves a polymer residue within the contact hole. In order to remove this polymer, a wet clean is used to remove the polymers arising from the contact hole formation. Moreover, ashing is typically used to remove the resist. These multiple complicated ashing and wet cleaning processes typically result in defects, such as the presence of particles due to the additional handling of the semiconductor device. In addition, the layer W plug CMP process normally scratches the anti-reflective coating layer on top of dielectric material, thereby forming massive defects in the form of scratches. These scratches make it difficult to distinguish true particle defects from the scratches. Typically a long polishing step is necessary to remove the top anti-reflective coating layer in order to preclude scratch formation.
Accordingly, what is needed is a system and method for providing a semiconductor device having contacts with fewer defects. The present invention addresses such a need.